aod4184/AOI4184 40v n-channel mosfet general description product summary v ds i d (at v gs =10v) 50a r ds(on) (at v gs =10v) < 8m ? r ds(on) (at v gs = 4.5v) < 11m ? 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r jc 120 pulsed drain current c continuous drain current parameter typ max t c =25c 2.3 25 t c =100c junction and storage temperature range -55 to 175 c thermal characteristics units maximum junction-to-ambient a c/w r ja 18 44 22 v 20 gate-source voltage drain-source voltage 40 the aod4184/AOI4184 used advanced trench technology and design to provide excellent r ds(on) with low gate charge. with the excellent thermal resistance of the dpak package, those devices are well suited for high current load applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 40v avalanche energy l=0.1mh c mj avalanche current c 5 continuous drain current 61 6.5 a 35 a t a =25c i dsm a t a =70c i d 50 40 t c =25c t c =100c power dissipation b p d w power dissipation a p dsm w t a =70c 50 1.5 t a =25c maximum junction-to-case c/w c/w maximum junction-to-ambient a d 2.4 55 3 g d s to252 dpak topview bottom view g s d g s d g g d d s s d to p view bottom view to-251a ipak rev0 : april 2009 www.aosmd.com page 1 of 6
aod4184/AOI4184 symbol min typ max units bv dss 40 v v ds =40v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.7 2.2 2.6 v i d(on) 120 a 6.7 8 t j =125c 11 13 8.5 11 m ? g fs 37 s v sd 0.72 1 v i s 20 a c iss 120 1500 1800 pf c oss 150 215 280 pf c rss 80 135 190 pf r g 2 3.5 5 ? q g (10v) 21 27.2 33 nc q g (4.5v) 10 13.6 16 nc q gs 4.5 nc q gd 6.4 nc t d(on) 6.4 ns t r 17.2 ns t d(off) 29.6 ns t f 16.8 ns t rr 20 29 38 ns q rr 18 26 34 nc components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =20a, di/dt=100a/ s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =20v, r l =1 ? , r gen =3 ? gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =20v, i d =20a gate source charge gate drain charge total gate charge m ? i s =1a,v gs =0v v ds =5v, i d =20a v gs =4.5v, i d =15a forward transconductance diode forward voltage r ds(on) static drain-source on-resistance i dss a v ds =v gs i d =250 a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time drain-source breakdown voltage on state drain current i d =250 a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a reverse transfer capacitance i f =20a, di/dt=100a/ s v gs =0v, v ds =20v, f=1mhz switching parameters a . the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design, and the maximum temperature of 175c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =175c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. rev 0 : aug 2009 www.aosmd.com page 2 of 6
aod4184/AOI4184 typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0 20 40 60 80 100 2 2.5 3 3.5 4 4.5 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 5 6 7 8 9 10 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m ? ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 -50 -25 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =4.5v i d =15a v gs =10v i d =20a 5 10 15 20 25 246810 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m ? ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =20a 25c 125c 0 20 40 60 80 100 120 012345 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =3v 3.5v 5v 10v 4v rev 0 : aug 2009 www.aosmd.com page 3 of 6
aod4184/AOI4184 typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0 2 4 6 8 10 0 5 10 15 20 25 30 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 500 1000 1500 2000 2500 0 10203040 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 200 400 600 800 1000 1e-05 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance c oss c rss v ds =20v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z jc .r j t t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t c =25c 10 s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 s 10ms 1ms dc r ds(on) limited t j(max) =175c t c =25c 100 s r jc =3c/w rev 0 : aug 2009 www.aosmd.com page 4 of 6
aod4184/AOI4184 typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note h) z ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 10 100 0.000001 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) i ar (a) peak avalanche current 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note f) power dissipation (w) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note f) current rating i d (a) t a =25c 1 10 100 1000 0.001 0.1 10 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) t a =25c t a =150c t a =100c t a =125c r ja =55c/w rev 0 : aug 2009 www.aosmd.com page 5 of 6
aod4184/AOI4184 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0 : aug 2009 www.aosmd.com page 6 of 6
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